The present invention relates to a process for manufacturing a semiconductor wafer capable of effectively reducing unevenness having a relatively long wavelength of 0.5 mm or more that remains on a surface of the semiconductor wafer, for example, a silicon wafer (hereinafter may be simply referred to as a xe2x80x9cwaferxe2x80x9d) after a first polishing step, and improving a surface flatness thereof; and a semiconductor wafer.
With highly developed integration of devices, even device makers increasingly use polishing machines for film polishing in order to improve uniformity in film thickness and flatness of a film surface after film formation in a device fabrication process.
As shown in FIG. 12, however, when surface unevenness having a wavelength of 0.5 mm or more and a relatively large P-V value (width of from a peak to a valley of the unevenness: Peak to Valley) of the order of 0.1 xcexcm are present on a surface of a wafer W prior to formation of a film F thereon, because thickness of the film F is of the order of 0.2 xcexcm, although flatness of a surface of the film F is improved by polishing it, uniformity in thickness of the remaining film F after the polishing is greatly affected by the unevenness on the surface of the wafer W.
Therefore, in order to increase a product yield in a device fabrication process, it is necessary to reduce the unevenness on the surface of the wafer W. However, as a matter of fact, there frequently remains unevenness having a relatively long wavelength of 0.5 mm or more on the surface of the wafer W, whereby it is more likely to raise a problem of non-uniformity in thickness of the remaining film in the film polishing process performed by the device makers.
A prior art manufacturing process for a semiconductor wafer, for example, a silicon wafer comprises, as shown in FIG. 8, a slicing step 10, a chamfering step 12, a lapping step 14, an etching step 16, a polishing process 18, and a cleaning step 20.
In the polishing process 18, a wafer W is polished using a polishing apparatus A as shown in FIG. 13. The polishing apparatus A has a polishing turn table 30 which is rotated at a prescribed rotational speed by a rotary shaft 37. A polishing cloth P is fixed on an upper surface of the polishing turn table 30. Numeral reference 33 indicates a work holding plate and the work holding plate 30 is rotated by a rotary shaft 38 with a top weight 35 interposed therebetween. One or more wafers W are held on a bottom surface of the work holding plate 33 by means of an adhesive or the like and pressed onto a surface of the polishing cloth P in the state held on the under surface of the work holding plate 33, while a polishing agent solution (slurry) 39 is supplied concurrently onto the polishing cloth P through a polishing agent supply tube 34 from a polishing agent supply apparatus (not shown) at a prescribed rate, thus the wafer or wafers being polished through rubbing of a to-be-polished surface of the wafer or wafers against the surface of the polishing cloth P with the polishing agent solution 19 interposed therebetween.
The polishing process 18 includes usually plural steps of a rough polishing step for planarization and a final polishing step for improvement of surface roughness and removal of polishing scratches. FIG. 8 shows an example of a 3 stage polishing process composed of: a first polishing step 18a where a polishing cloth having a relatively high hardness is used for achievement of higher flatness of a silicon wafer; a second polishing step 18b where a polishing cloth softer than that used in the first polishing step 18a is used for removal of roughness, deformation and cloudiness on a surface of a wafer produced in the first polishing step; and a final polishing step 18c. 
In the rough polishing (including the first polishing and the second polishing in the example of FIG. 8), there has generally been used a relatively hard polishing cloth wherein a non-woven fabric such as a foamed urethane sheet or a foamed polyester sheet is impregnated with urethane resins, and in the final polishing, there has generally been used a suede-like polishing cloth wherein foamed urethane resins are formed on a base non-woven fabric. As a polishing agent, there is mainly used a dispersion liquid prepared by dispersing fumed silica, colloidal silica or the like in an alkaline solution.
Amounts of polishing stock removal in the polishing steps 18a to 18c are 5 xcexcm or more in the first polishing step 18a, 0.1 xcexcm or more in the second polishing step 18b and 0.01 xcexcm or more in the final polishing step 18c, respectively. Surface unevenness having a long wavelength of 0.5 mm or more, which can be a problem, is determined in the first polishing step 18a where the hardest polishing cloth is used (FIGS. 9, 10 and 11). FIGS. 9 and 11 show variations in a surface state of a wafer in respective polishing steps and FIG. 10 schematically shows an influence (transfer) of surface undulations of a polishing cloth especially used in the first polishing step on a shape of the wafer. In the second polishing step, the amount of the polishing stock removal is very small and a polishing cloth in use is soft; hence in the present state the above-described unevenness can not be corrected sufficiently.
That is, as shown in FIGS. 9 and 11, (a) on a wafer W1 after the first polishing, there comes into being a combined state of relatively large surface unevenness having a wavelength of 0.5 mm or more, for example, of the order of from 0.5 mm to 10 mm, and a P-V value of the order of from tens to hundreds of nm, and fine surface unevenness having a wavelength of 0.5 mm or less, for example, of the order of from 0.01 to 0.10 mm, and a P-V value of the order of from tens to hundreds of nm; (b) on a wafer W2 after the second polishing, a P-V value of surface unevenness having a relatively fine wavelength, for example, of from 0.01 to 0.10 mm is improved and (c) on a wafer W3 after the final polishing, a P-V value of surface unevenness having a wavelength from 0.01 to 0.10 mm is further improved. However, even after the second polishing and the final polishing, there still remains relatively large surface unevenness having a wavelength of 0.5 mm or more, for example, of the order of from 0.5 mm to 10 mm, and a P-V value ranging from tens to hundreds of nm.
In this way, in the prior art polishing steps, when performing the plural polishing steps, hardness of a polishing cloth used in the first polishing step is the highest and in subsequent steps, polishing cloths hardness of which is lowered in serial sequence of the steps are used, but as stated above there remains a problem that the surface unevenness having a wavelength of 0.5 mm or more can not be corrected.
In order to reduce a P-V value of unevenness having a relatively long wavelength, for example, of 0.5 mm or more in the first polishing, a polishing cloth having higher and uniform hardness should be used, but using such a polishing cloth in the first polishing, an amount of the polishing stock removal becomes large; thus the polishing cloth is loaded and scratches are produced on a wafer surface so that it is practically difficult to use such a polishing cloth.
In view of an amount of polishing stock removal, such a polishing step as the prior art one is performed, but in this case as described above, surface unevenness having a relatively long wavelength remains unchanged. The presence of such surface unevenness can be confirmed by an evaluation where a wafer surface is divided with a specific area, for example, an area 0.5 mm square, a P-V value in each area is confirmed and it is evaluated to what extent the wafer surface is occupied with a specific P-V value. In the prior art polishing step, for example, when the above evaluation is performed in an area 0.5 mm square, there was present even a wafer with a P-V value of the order of 20 nm. In company with a progressive request for a wafer with good flatness, however, even the presence of a P-V value of the order of 20 nm is a problem; there is requested improvement on the above problems.
It is accordingly an object of the present invention to provide a process for manufacturing a semiconductor wafer capable of effectively reducing unevenness having a wavelength of 0.5 mm or more which remains on a surface of the semiconductor wafer after a first polishing step, and improving flatness thereof; and a semiconductor wafer.
Then, the inventors have conducted a serious research for the purpose to develop a new polishing process by which the above surface unevenness is reduced. As a result of the research, there is newly found the fact that after a first polishing step when a wafer is additionally polished with stock removal of the order of from 0.3 to 3 xcexcm using a polishing cloth which is uniform in hardness and harder than that used for the first polishing step, the polishing cloth is not loaded and there can be obtained a polished wafer which is small in the above-described unevenness and good in flatness.
A further research has been continued to reveal the additional fact that after the additional polishing step the wafer is as conventionally subjected to, for example, the conventional second and final polishing for improving unevenness having a wavelength of 0.5 mm or less and there can be obtained a polished wafer without cloudiness, the present invention having been completed on the basis of the above finding.
In order to solve the above problem, a process for manufacturing a semiconductor wafer of the present invention comprises: plural polishing steps including a first polishing step and a final polishing step; and a corrective polishing step performed after the first polishing step using a polishing cloth harder than that used in the first polishing step.
Hardness of a polishing cloth used in the first polishing step is preferably in the range of from 73 to 86 in Asker-C scale and hardness of a polishing cloth used in the corrective polishing cloth is preferably in the range of from 80 to 98 in Asker-C scale. An Asker-C hardness is a value measured with a C type Asker rubber hardness meter, a kind of a spring hardness tester.
Unevenness having a wavelength of 0.5 mm or more on a surface of a semiconductor wafer remaining after the first polishing step can be reduced in the corrective polishing step.
A polishing cloth used in the corrective polishing step is preferably one whose surface in contact with a wafer is of high hardness. For example, the following polishing cloths are preferable in the aspect of hardness: a polishing cloth prepared by further impregnating a polishing cloth made of a polyester non-woven fabric impregnated with urethane resins used in a prior art first polishing, with much of urethane resins or the like to increase its surface hardness; and a polishing cloth made of chemical reaction foamed materials, for example, urethane resins, especially, made of non-foamed urethane resins having small bubbles. While no specific limitation is imposed on the polishing cloth, it is preferably a high hardness polishing cloth with uniform hardness over its surface and low generation of scratches.
While a process of the present invention may be applied to polishing processes of plural polishing steps, among them, the most effective one is the way where in a 3 stage polishing process including a first polishing step, a second polishing step and a final polishing step, after the first polishing step, the corrective polishing step is performed. If required, the corrective polishing step may be substituted for the second polishing step.
The first polishing step in the present invention is a polishing step in which a relatively high hardness polishing cloth is used for the purpose of higher flatness of a silicon wafer, and includes not only a single stage but also plural stages.
In a semiconductor wafer of the present invention, when a semiconductor wafer surface is evaluated in an area 0.5 mm square, an occupancy rate of the area where a P-V value is 15 nm or more in the semiconductor wafer surface is less than 0.01%.
When the above semiconductor wafer surface is evaluated in an area 2.0 mm square, an occupancy rate of the area where a P-V value is 20 nm or more in the semiconductor wafer surface is preferably less than 0.15%.
When the above semiconductor wafer surface is evaluated in an area 10.0 mm square, an occupancy rate of the area where a P-V value is 50 nm or more in the semiconductor wafer surface is more preferably less than 0.15%.
Function
The greatest feature of a process of the present invention is in that a polishing step for reducing surface unevenness having a wavelength of 0.5 mm or more, that is, a corrective polishing step is newly added after a first polishing step. By using a polishing cloth harder than that used in the first polishing step, for example, a non-foamed urethane resin polishing cloth, in the corrective polishing step subsequent to the first polishing step, unvenness having a wavelength of 0.5 mm or more on a surface of the polishing cloth is decreased; unevenness having a wavelength of 0.5 mm or more on a surface of a wafer produced prior to the first polishing step or during the first polishing step is improved.
Furthermore, since a polishing cloth used in the corrective polishing step is of a hard type, a sag in an outer peripheral edge portion of the wafer depending on a polishing stock removal is decreased to realize improved flatness polishing. For example, in a comparison of unevenness of wafer surfaces in an area 0.5 mm square, it has been confirmed that unevenness of a P-V value of 20 nm or more is not observed in a wafer polished according to a prior art polishing process; unevenness of a P-V value of 16 nm or more is not observed in a wafer polished according to a polishing process of the present invention and surface flatness of the polished wafer is also improved by introduction of a high hardness polishing cloth.